ResearchPod Summary
Quantum circuit simulation relies on contracting complex-valued tensor networks. However, modern high-performance hardware accelerators—such as NPUs and TPUs—are optimized exclusively for real-valued matrix multiplication (GEMM). Existing software-level workarounds, such as the textbook four-multiplication (4M) or Gauss's three-multiplication (3M) methods, often fail to exploit the partial realness of quantum circuits, leading to inefficient resource usage.
The authors propose a local graph-rewriting technique called "realification." By treating the complex numbers as a 2D real algebra, they replace complex tensors with real tensors that include an auxiliary dimension-2 index. A rank-3 structure tensor (C) is inserted at each merge point to mediate complex multiplication. This transformation allows the entire tensor network to be represented as a static real-valued einsum, which can be executed directly on standard real-only hardware without modifying the underlying accelerator kernels.
The study establishes a tight cost law for this transformation, showing that the arithmetic overhead is 1 + 2m + r (where m and r are the volume fractions of two- and one-complex-operand contractions), ensuring the overhead never exceeds 3x. Unlike previous circuit-level realification methods that force a rigid "worldline" contraction order, this approach allows the contraction tree to be optimized freely. Benchmarks on an Ascend 910 NPU across 67 circuits demonstrated that this method consistently outperformed standard 4M and 3M baselines, achieving median speedups of 1.7x for random circuits and 1.4x for structured circuits.
This work bridges the gap between complex-valued quantum simulation algorithms and the real-valued hardware primitives of modern AI accelerators. By enabling native execution of complex tensor networks on real-only engines, it allows researchers to leverage the full performance of modern hardware without sacrificing the flexibility of contraction-order optimization.
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