Rapid FinFET Modelling Using an Autoencoder

Traditional Technology Computer-Aided Design (TCAD) simulations are essential for predicting semiconductor device behavior but are often computationally expensive and require significant domain expertise. This study explores a machine learning alternative using an autoencoder (AE) to model FinFET characteristics. The primary goal is to develop a data-driven framework that can compress complex current-voltage (I-V) curves into a low-dimensional latent space, enabling rapid device characterization and circuit-level simulation without the overhead of traditional physical models.

The researchers utilized the industry-standard BSIM-CMG compact model to generate a dataset of drain current versus gate voltage (ID-VG) characteristics for 12-nm p-channel bulk FinFETs. A key innovation in this approach is the explicit inclusion of drain-to-source voltage (VDS) as an input feature alongside the gate voltage, which allows the autoencoder to better capture bias-dependent variations in device physics. The architecture consists of a symmetric encoder-decoder network with a three-neuron bottleneck, trained using the Adam optimizer. The model was evaluated on its ability to reconstruct full I-V curves and extract critical metrics, including threshold voltage (VTH), subthreshold slope (SS), and peak transconductance (gm).

The autoencoder successfully reconstructed the I-V curves with high fidelity, achieving an R² value consistently exceeding 0.9 across various drain-to-source voltages. The model demonstrated low percentage error in predicting VTH, SS, and gm, confirming its ability to capture the device's switching behavior accurately. The results suggest that this data-driven approach is a robust and efficient alternative to traditional compact models, providing a scalable tool for analog, digital, and RF circuit design.