The SpiNNaker2 chip: a many-core platform for flexible and scalable brain-inspired computing

SpiNNaker2 is a many-core hardware platform designed to bridge the gap between traditional deep learning and neuromorphic computing. By combining the flexibility of software-based processing with dedicated hardware acceleration, the chip provides a versatile environment for exploring event-based algorithms, spiking neural networks (SNNs), and standard deep neural networks (DNNs).

The chip architecture centers on 152 processing elements (PEs), each containing an ARM M4F processor and specialized accelerators for matrix multiplication, convolution, and transcendental functions (exponentials and logarithms). This design allows for a hybrid approach where algorithms are implemented primarily in software, providing significant flexibility compared to rigid, application-specific neuromorphic hardware. The PEs are organized into 'Quads' that support dynamic voltage and frequency scaling (DVFS), enabling the system to adapt its power consumption to varying workload demands.

A core feature of SpiNNaker2 is its extended event-based routing fabric, which facilitates scalable communication across large systems. The chip uses a hexagonal grid topology, allowing it to scale from single-chip mobile applications to massive mainframe-like systems with millions of cores. The routing fabric is designed to handle multicast packets efficiently, mimicking the connectivity patterns found in biological neural networks, which minimizes data transfer overhead for sparse, event-driven computations.

SpiNNaker2 demonstrates strong performance across diverse workloads. For deep learning, it reaches up to 4.5 TOPS (tera-operations per second) in high-performance mode and maintains an efficiency of 2.7 TOPS/W in high-efficiency mode for INT8 workloads. For neuromorphic tasks, the chip can simulate networks with over 150,000 neurons and process more than 1.8 billion synaptic events per second. Its low baseline power consumption (under 250 mW) makes it particularly well-suited for sparse, energy-constrained AI applications.