Emulation of Entanglement Distribution Networks on a Quantum Computer

Research Overview

This paper investigates how quantum computers can emulate distributed quantum networks, specifically focusing on the construction of multipartite-entanglement graph states. As practical, large-scale quantum networks are not yet fully realized, the authors use a teleportation-based protocol to create virtual entanglement between disconnected qubits. By applying three distinct noise models—Stinespring dilation (unitary), randomly applied Pauli errors, and quasi-probability decomposition (QPD)—the researchers evaluate how degraded entanglement fidelity and classical communication latency impact the performance of these distributed systems.

The authors implement a ring graph state where one edge is realized via a virtual controlled-Z (CZ) gate using a "cut" Bell pair. They test this setup in both simulation (modeled after the IBM Torino processor) and on actual superconducting hardware (IQM Emerald). The study systematically varies the input fidelity of the distributed entanglement and introduces artificial classical communication delays to observe the resulting impact on graph state fidelity and stabilizer values.

Key Findings

The study reveals that the QPD method is the most effective for emulating noise, as it introduces no additional gate overhead. However, the most critical finding is that noise models considered mathematically equivalent in theory diverge significantly in practice. On physical hardware, transpilation processes—which convert abstract gates into native hardware instructions—introduce unequal gate counts and error accumulation, making some models perform much worse than others. Furthermore, the authors find that while classical communication delays are negligible over short distances (meters), they only become a limiting factor for entanglement distribution at distances on the scale of tens of kilometers.

As researchers move toward distributed quantum computing, the ability to accurately simulate network performance on existing hardware is vital. This work demonstrates that experiment design is not just about choosing a theoretically sound noise model, but about understanding how that model interacts with the specific constraints and compilation pipelines of the target quantum processor. These insights are essential for developing robust, scalable algorithms for future quantum internet architectures.