ResearchPod Summary
Persistent acoustic monitoring allows machines to be inspected for rare faults without physical contact, but maintaining always-on inference is severely constrained by power, latency, and system complexity. While one-class anomaly detection is well-suited for industrial machine monitoring because training data consists almost exclusively of normal operational sounds, conventional CPUs and GPUs incur high energy costs during continuous operation. This paper investigates whether an Intel Loihi 2 neuromorphic processor can perform efficient, low-power acoustic anomaly detection using an on-chip autoencoder architecture.
The researchers deployed a dense autoencoder architecture onto a 16-chip Loihi 2 VPX system. Audio data is first converted off-chip into log-mel feature vectors, which are then streamed into the Loihi 2 processor. On the neuromorphic chip, the input undergoes fixed-point normalization, autoencoder inference, L1 reconstruction scoring, and thresholding to make real-time binary anomaly decisions. The system was evaluated using two primary benchmarks: a clean, microphone-position-invariant ToyADMOS ToyCar dataset and a noisy DCASE 2026 Task 2 ToyCar dataset using only the near-microphone channel.
On the clean ToyADMOS benchmark, the on-chip neuromorphic model achieves an area under the curve of 0.9959 and a standardized partial AUC of 0.9785 at a maximum false-positive rate of 0.1. On the noisy DCASE 2026 ToyCar benchmark, the model outperforms baseline metrics, yielding source AUC 0.7990, target AUC 0.6466, and partial AUC 0.6426. Power profiling reveals that the 16-chip Loihi 2 system achieves real-time throughput with a dynamic energy consumption of 0.0406 to 0.0426 millijoules per sample, which is roughly two orders of magnitude lower than comparable CPU and GPU implementations.
These results establish neuromorphic processors as practical, highly energy-efficient hardware substrates for persistent industrial monitoring. Because the autoencoder maps to only 74 of the thousands of available neuromorphic cores on the system, substantial computational headroom remains available for additional models, multi-sensor fusion, or on-chip preprocessing.
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